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PCI-T32MF: 32-bit, 33 MHz Multifunction Target Interface Core

The PCI-T32MF is a target-only PCI interface core compliant with the PCI 2.3 specification, supporting a 32-bit address/data bus and operating at up to 33 MHz. It allows one to eight independent PCI functions per chip, each with 64 to 256 bytes of PCI Configuration Space and up to six Base Address Registers, decoding I/O and Memory space from 16 bytes to 4GB. Developed with over 20 years of CAST PCI IP expertise, the core is optimized for easy reuse, integration, and technology mapping. It is available as synthesizable RTL or a targeted FPGA netlist, with full support for rapid implementation.

PCIe GEN6 Controller IP

The PCIe Gen 6 Controller IP supports the full PCI Express 6.x specification, offering scalable, high-speed communication for enterprise-grade solutions. FIRST in the industry to deliver PCIe IPs across multiple generations. It is: - Optimized for existing and emerging FPGA uses cases for hardening onto ASIC / SoC. - Best for large memory, compute-intensive and high data rate applications.

PCIe GEN6 PHY IP

Logic Fruit's PCIe GEN6 PHY IP achieves data rates up to 64GT/s per lane with PAM4 signaling thereby delivering reliable performance for high-speed data transfer. It supports advanced applications, including AI/ML, High-Performance Computing, and next-generation storage solutions.

PIB

PIB is an intelligent development platform based on an Intel x86 i7 CPU and Cyclone V GT FPGA, designed for applications such as industrial control, vision optimization, and edge computing.

PPS Master (Pulse Per Second)

Full standalone hardware only Pulse Per Second generator

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Printed circuit board pattern design and simulation

RITA Electronics offers printed circuit board pattern design and simulation that corresponds to high-speed signal transmission and noise suppression. These engineering services correspond to the Altera FPGA devices with high-speed interfaces.

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Proc Dev Kit - FPGA programming SDK

Automatically generate Application Support Packages (ASPs) that intelligently map board resources to your application’s needs. This seamless virtual processing instantly recognizes and accesses installed IPs, empowering multiple programs to run simultaneously. Reduce risk, cost, and effort while maximizing system reliability.Designed as a unique market solution, the Proc Dev Kit streamlines and simplifies the FPGA design process by enabling developers, FPGA engineers, and software teams to generate a tailored Application Support Package (ASP). This package seamlessly integrates application-specific FPGA development resources with complementary software drivers, creating a complete and cohesive development environment.

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Proc Vision Suite – development and validating for imaging & vision on FPGA

Gidel’s ProcVision suite provides a market-unique ecosystem for developing high-performance custom imaging and vision systems based on FPGA. The suite enables FPGA-level customization of the Gidel frame grabbers and edge computers. Such customization includes tailoring of the acquisition path, the image processing, system architecture and more. The suite includes FPGA and SW libraries, templates, examples and tools for that accelerate development on FPGA and integration with software. The ProcWizard application that is part of the suite generates tailored board support package that optimizes the FPGA resources to the application needs. The ProcWizard also enables virtualization of the FPGA space such allowing for multiple applications to operate simultaneously on the FPGA. The suite also includes the CertifEye test bench that enables testing and verification of the full design on FPGA.

Proc10A-40GigE: 40GigE Vision Frame Grabber\Smart NIC

Proc10A-40GigE vision Frame Grabber & Image Processing System Smart NIC