Proc10A-CXP6: CoaXPress-6 Frame Grabber & Image Processing
The Proc10A-CXP6 is a 8 x CoaXPress-6 Frame Grabber card with option for real-time image processing and compression. The card is supported by off-the-shelf modular building blocks for embedding in the acquisition pipeline, including HDR, white balance, gamma correction, compression (JPG, lossless, Quality+), and more. It is also supported by Gidel's InfiniVision acquisition architecture, optimized for grabbing from 100 + cameras.
By Gidel
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Product Engineering Services
All Product Engineering Services and Solutions (ASIC/FPGA/SoC/Embedded/Hardware/PCB)
By Mobiveil Inc.
PTP Ordinary Clock (IEEE1588 – Precision Time Protocol)
Full standalone hardware only solution of a PTP Ordinary Clock
By NetTimeLogic GmbH
PTP Timestamp Unit (IEEE1588 – Precision Time Protocol)
PTP Timestamp Unit
By NetTimeLogic GmbH
PTP Transparent Clock (IEEE1588 – Precision Time Protocol)
Full standalone hardware only solution of a PTP Transparent Clock
By NetTimeLogic GmbH
Quality+ IP - 1:10 video compression preserves image SNR
Gidel’s Quality+ (Q+) IP targeting FPGA compresses Color Filter Array (CFA – e.g., Bayer), Monochrome, and RGB images and videos in real-time. Q+ revolutionizes image compression, achieving up to 1:10+ compression ratios for high-bandwidth image streams while preserving original image quality.The Quality+ IP can be embedded seamlessly in Gidel's image acquisition systems, including the Gidel frame grabbers and compact edge computers. The compression supports high-end camera streaming, including 10+ GigE Vision, CoaXPress and Camera Link. Gidel's real-time compression IPs are particularly beneficial for high-bandwidth and high-resolution imaging and vision applications enabling to improve image quality while increasing recording time, reducing storage size, and reducing post recording data offload and compression time on host computer.
By Gidel
Real-Time JPEG Compression IP
Gidel’s real-time JPEG image compression (encoder) IP enables high-performance JPEG compression on FPGA. The compression IP is unique in its fast processing capacity, low latency, and compact silicon utilization. As a result of its compactness, the IP can be implemented on a small FPGA device to compress high-performance camera image streams or, alternatively, instantiated multiple times on a single larger FPGA device. The JPEG IP can be embedded seamlessly in Gidel's image acquisition systems, including the Gidel frame grabbers and compact edge computers. The compression supports high-end camera streaming, including 10+ GigE Vision, CoaXPress and Camera Link. Gidel's real-time compression IPs are particularly beneficial for high-bandwidth and high-resolution imaging application enabling increased recording time, reduces storage size, and reduced post recording data offload and compression time on host computer.
By Gidel
Reed Solomon II FPGA IP Core
The Reed Solomon II IP offers a fully parameterizable Reed Solomon encoder and decoder.
By Altera
S10PCIe-TS
The MPAC6500 (Hambledon) is a full-height, full-length PCIe Gen3 x16 FPGA packet-processing card with an Intel® Stratix® 10 FPGA and 4×100GBASE-LR4/SR4 QSFP28 interfaces.
By Terasic Inc.
