Backplane Ethernet 10GBASE-KR PHY FPGA IP
The Backplane Ethernet 10GBASE-KR PHY Altera FPGA Intellectual Property (IP) core is a transceiver PHY that allows you to instantiate the hard standard physical coding sublayer (PCS), the higher performance hard 10G PCS, and the hard physical medium attachment (PMA) for a single Backplane Ethernet channel.
By Altera
BlueFjord FBAP4@AGF series FPGA accelerator
The Silicom BlueFjord FPGA accelerator(FBAP4@AGF series) is a high-performance, OEM hardware acceleration platform tailored for compute-intensive server environments. It excels in tasks such as cryptographic processing, compression acceleration, and offloading 5G RAN functions like FEC/LDPC. Built on the Intel (Altera) Agilex™ 7 F-Series FPGA with a dual F-tile package and optionally featuring a Hard Processor System (HPS) with quad 64-bit ARM Cortex-A53 cores, it offers powerful, flexible logic capacity ranging from approximately 573K to 2,692K logic elements.
By Silicom Ltd.
BxBChan Channelizer
An efficient implementation of a Polyphase Filter Bank channelizer.
By Bit by Bit Signal Processing LLC
BxBFFT Fast Fourier Transform
An extraordinarily Fast, Efficient, and Feature-Packed FFT implementation.
By Bit by Bit Signal Processing LLC
CamSim-CL: Camera Link camera Simulator
The CamSim-CL™ is a flexible, high-performance camera simulator that generates Camera Link video streams and test patterns for testing frame grabbers or vision/imaging systems. The system supports all Camera Link™ v2.0 configurations and is supported by a GUI and API suite. Gidel’s CamSim data flow repetition capability ensures that users validate algorithms and confirm they work as expected with pertinent input. Moreover, once developers detect a rare bug, they can accurately reconstruct the respective data flow to locate and quickly fix the bug.
By Gidel
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CamSim-CXP: CoaXPress Camera Simulator
The CamSim-CXP™ is a flexible, high-performance camera simulator that generates CoaXPress video streams and test patterns for testing frame grabbers or vision/imaging systems. The system supports all CoaXPress configurations and is supported by a GUI and API suite. Gidel’s CamSim data flow repetition capability ensures that users validate algorithms and confirm they work as expected with pertinent input. Moreover, once developers detect a rare bug, they can accurately reconstruct the respective data flow to locate and quickly fix the bug.
By Gidel
CAN-CTRL: CAN 2.0, CAN FD, & CAN XL Bus Controller Core
"The CAN-CTRL is a CAN bus controller compliant to Classical CAN, CAN FD, and CAN XL. The core is easy to use and integrate, featuring programmable interrupts, data and baud rates; and a configurable number of independently programmable acceptance filters. It implements a flexible buffering scheme, allowing fine-tuning of the core size to satisfy the requirements of each specific application.The number of receive buffers is synthesis-time configurable. Two types of transmit buffers are implemented: a high-priority primary transmit buffer (PTB) and a lower-priority secondary transmit buffer (STB). Finally, the CAN-CTRL provides error analysis, diagnosis, maintenance, and optimization features. The CAN-CTRL is available in two versions: Standard and Safety-Enhanced. The Safety-Enhanced version implements ECC for SRAMs protection and uses spatial redundancy for protecting the inner logic of the core. The Safety-Enhanced versions are certified as ISO-26262 ASIL-D Ready. "
By Computer Aided Software Technologies, Inc (dba CAST)
