H16550S: Synchronous 16550 UART with FIFO Core
The H16550S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16550 device. It performs serial-to-parallel conversion on data originating from modems or other serial devices, and performs parallel-to-serial conversion on data from a CPU to these devices. The H16550S can be run in either 16450-compatible character mode or in 16550-compatible FIFO mode, where an internal FIFO relieves the CPU of excessive software overhead. Developed for easy reuse in FPGA or ASIC applications, the H16550S is available optimized for several technologies with competitive utilization and performance characteristics.
By Computer Aided Software Technologies, Inc (dba CAST)
H16750S: UART with FIFOs, IrDA and Synchronous CPU Interface
The H16750S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16750 device. It performs serial-to-parallel conversion on data originating from modems or other serial devices, and performs parallel-to-serial conversion on data from a CPU to these devices. The H16750S can be run in either 16450-compatible character mode or FIFO mode, where an internal FIFO relieves the CPU of excessive software overhead. An IrDA-compliant serial data port may be used for infrared communication. Developed for easy reuse in FPGA or ASIC applications, the H16750S is available optimized for several technologies with competitive utilization and performance characteristics
By Computer Aided Software Technologies, Inc (dba CAST)
H264-E-BPF - Ultra-fast, AVC/H.264 Baseline Profile Encoder
The H264-E-BPF IP core is a video encoder supporting the Constrained Baseline Profile of the ISO/IEC 14496-10/ITU-T H.264 standard. The H264-E-BPF encoder requires less silicon area than most equally capable hardware H.264 encoders—approximately 250K gates—allowing for very cost-effective implementations. Its small silicon footprint, low external memory bandwidth requirements, and zero software overhead enable high-throughput H.264 coding at an extremely low energy cost.
By Computer Aided Software Technologies, Inc (dba CAST)
HAN Pilot Platform
Terasic’s HAN Pilot Platform is a high-performance flagship development kit based on Intel Arria 10 SoC FPGAs. With the goal of “being the pilot platform for HPC, Automotive, and Networking applications (HAN),” the board is purpose built for performance-demanding industrial embedded applications.
By Terasic Inc.
HawkEye-20GigE: 20 GigE Vision Frame Grabber & Image Processing\Smart NIC
HawkEye-20GigE Vision Dual-Port 10 GigE Frame Grabbing & Image Processing System\Smart NIC. The HawkEye-20 GigE Frame Grabber is ideal for high performance, high-bandwidth applications based on multiple cameras and/or ultra-high bandwidth cameras. The HawkEye-20GigE's real-time FPGA processing ensures zero frame loss and virtually zero CPU utilization, freeing the CPU for key processing tasks.
By Gidel
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HawkEye-CL: Camera Link Frame Grabber & Image Processing
The HawkEye-CL Frame Grabber is Camera Link Rev. 2.0 compliant, offering a number of options, from plug-and-play grabbers to a full system solution that includes acquisition and on-FPGA processing. The card is supported by off-the-shelf modular building blocks for embedding in the acquisition pipeline, including HDR, white balance, gamma correction, compression (JPG, lossless, Quality+), and more. It is also supported by Gidel's InfiniVision acquisition architecture, optimized for grabbing from 100+ cameras.
By Gidel
HawkEye-CXP12: CoaXPress-12 Frame Grabber & Image Processing
The HawkEye-CXP12 is a 4 x CoaXPress-12 Frame Grabber card with option for real-time image processing and compression. The card is supported by off-the-shelf modular building blocks for embedding in the acquisition pipeline, including HDR, white balance, gamma correction, compression (JPG, lossless, Quality+), and more. It is also supported by Gidel's InfiniVision acquisition architecture, optimized for grabbing from 100 + cameras
By Gidel
HBM2E (High-Bandwidth Memory) FPGA IP
HBM2E is a high-performance memory IP that offers a combination of high memory bandwidth, low power consumption, low latency, and small form factor for Agilex™ 7 FPGA M-Series devices. HBM2E memory is well-suited for various high-performance computing applications.
By Altera
HDMI IP Core
The HDMI Altera® FPGA IP core delivers high-performance, standards-compliant support for the latest HDMI specifications, enabling seamless transmission of high-definition audio and video over a single interface. It provides a robust and flexible solution for integrating next-generation video display connectivity into Altera FPGA designs.
By Altera