XIP8001B True Random Number Generator (TRNG) IP Core

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Xiphera Ltd.

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The True Random Number Generator (TRNG) IP core establishes a benchmark for hardware-based security in cryptographic systems, by generating high-entropy, true random numbers essential for secure communications and cryptographic operations, such as key generation. It includes a robust and thoroughly characterised entropy source, online health tests and a proven AES-CBC-MAC-based entropy extractor.

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Key Features

Compact Size: The entire design requires only 1387 Adaptive Lookup Modules (ALMs) (Intel® Cyclone® 10 GX) and 1-2 internal memory blocks1 in a typical FPGA implementation.
Autonomous Operation: The entropy source used by XIP8001B functions independently from the rest of the FPGA logic; for example no FPGA internal clock signals are required for the entropy source to function.
Parameterizability: XIP8001B has a number of parameterizable features, including the width of the dout output, the sizes (width and depth) of the internal buffers, and the threshold values for the health tests.
Security Features: XIP8001B has anumberofadditional security features, including a zeroize function to erase (set to ’0’) all the bits in the internal buffer.
Standard Compliance: The core has been designed to comply with NIST SP 800-90B, thus making its use in a crypto module targeting a FIPS 140-3 certification possible.
Passing Statistical Tests: The output of the entropy source in XIP8001B passes PractRand, gjrand, TestU01, the NIST SP 800-22 statistical test suite, and the dieharder test suite.

Offering Brief

Device Family	Arria® 10 SX SoC FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, MAX® V CPLD, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Cyclone® IV E FPGA, Stratix® III FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	No
Compliance	Yes
Latest Quartus Version Supported	25.1.1
Development Language	Encrypted Verilog, Verilog