XIP7013E: IPSEC AES-256-GCM

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Xiphera Ltd.

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IPsec (Internet Protocol Security) is a widely implemented protocol to secure communications across the Internet. Xiphera’s Ipsec extreme speed IP core enhances secure communication at layer three (Network) of the OSI model, ensuring the authenticity and confidentiality of data traffic with up to 400G linerates. It leverages the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with a 256-bit key length, for Encapsulating Security Payload (ESP) frame processing within the IPsec protocol.

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Key Features

Performance: The extreme-speed XIP7013E achieves a throughput exceeding 200 Gbps in modern high-end FPGAs and ASICs. Importantly, XIP7013E does not require any extra interpacket gap cycles even when it processes short packets. The latency of XIP7013E is f ixed, and it does not depend on the length of the input packet.
Standard Compliance: XIP7013E is compliant with RFC4303 [3]. The cipher suite (AES-256GCM) is fully compliant with the Advanced Encryption Algorithm (AES) standard [1], as well as with the Galois Counter Mode (GCM) standard [2].
• Easy Interfacing: XIP7013E uses a streaming interface for payload data and side-channel signalling for the required ESP packet parameters.

Offering Brief

Device Family	Arria® 10 SX SoC FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Stratix® III FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	No
Compliance	Yes
Latest Quartus Version Supported	25.1.1
Development Language	Encrypted Verilog, Verilog