High speed AES256-GCM core implements the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with few tens of Gpbs linerates. AES-GCM is a widely used cryptographic algorithm for Authenticated Encryption with Associated Data (AEAD) purposes, providing both data confidentiality and authenticity.
Xiphera Ltd.
Key Features
- Moderate resource requirements: The entire XIP1113H requires 23773 Adaptive Lookup Modules (ALMs) (Altera® Cyclone® 10 GX), and does not require any multipliers, DSPBlocks or internal memory in a typical FPGA implementation.
- Optimized Implementation utilizing unrolling, pipelining, optimized AES S-box design, and GMAC calculation based on pipelined Karatsuba multipliers enable extremely high performance.
- Performance: XIP1113H achieves a throughput in the tens of Gbps range1, for example 51.43+ Gbps in AMD® Zynq® MPSoC.
- Standard Compliance: XIP1113H is fully compliant with both the Advanced Encryption Algorithm (AES) standard [2], as well as with the Galois Counter Mode (GCM) standard [3].
- Test Vector Compliance: XIP1113H passes all test vectors specified in.
- 128-bit and 256-bit Interfaces ease the integration of XIP1113H with other high-speed FPGA logic.
- Parametrisable Key Length in the XIP1113H allows runtime configuration between 128-, 192and 256-bit keys.
Offering Brief
Offering Brief
| Device Family | Arria® 10 SX SoC FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Stratix® III FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Demo | No |
| Compliance | Yes |
| Latest Quartus Version Supported | 25.1.1 |
| Development Language | Encrypted VHDL, VHDL |
Encrypted RTL or source code
Optional netlist
Sample synthesis scripts
Instantiation file
Comprehensive simulation test bench, scripts & guide
etailed datasheet and integration guide Xiphera, Ltd, is a Finnish company designing hardware-based security solutions using standardised cryptographic algorithms. Our product portfolio consists of secure and efficient cryptographic Intellectual Property (IP) cores, designed directly for ASICs and FPGAs. Our strong cryptographic expertise, extensive experience in system design, and deep knowledge in the field of reprogrammable logic enable us to offer our customers peace of mind in a dangerous world. Product
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XIP1113H
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