XIP1113B: AES256-GCM IP core

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Xiphera Ltd.

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Balanced speed AES256-GCM core implements the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with few Gpbs linerates. AES-GCM is a widely used cryptographic algorithm for Authenticated Encryption with Associated Data (AEAD) purposes, providing both data confidentiality and authenticity.

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Key Features

Compact resource requirements: The entire XIP1113B requires 3571 Adaptive Lookup Modules (ALMs) (Altera® Agilex® 7 I), and does not require any multipliers, DSPBlocks or internal memory1 in a typical FPGA implementation.
Performance: Despite its compact size, XIP1113B achieves a throughput in the Gbps range2, for example 4.44+ Gbps in AMD® Kintex® UltraScale+.
Standard Compliance: XIP1113B is fully compliant with both the Advanced Encryption Algorithm (AES) standard [2], as well as with the Galois Counter Mode (GCM) standard [3]
Test Vector Compliance: XIP1113B passes all test vectors specified in [1].
Flexible Interfaces ease the integration of XIP1113B with other FPGA logic and/or control software.

Offering Brief

Device Family	Arria® 10 SX SoC FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Stratix® III FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	No
Compliance	Yes
Latest Quartus Version Supported	25.1.1
Development Language	Encrypted VHDL, VHDL