USB 2.0 Device, Software based enumeration RAM Interface (USB20SR)

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System Level Solutions, Inc

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USB 2.0 Device, Software Enumeration (USB20SR) IP Core is a RAM based USB 2.0 device core with 32-bit Avalon interface and ULPI interface support. The core supports High Speed (480 Mbps), Full Speed (12 Mbps) and Low Speed (1.5 Mbps) functionality. IP core has been implemented in Verilog HDL and its functionality has been verified using different test cases in simulation environment as well as on hardware. It is provided as ready to use component and hence can be easily integrated in system. The package includes precompiled library of Host-BFM with predefined test cases for IP core simulation and verification.

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Key Features

Supports LS (1.5 Mbps), FS (12 Mbps) and HS (480 Mbps) modes.
Supports Control, Bulk, Interrupt and Isochronous transfers.
Capable to support up to 31 endpoints (1 default control endpoint + 15 IN/OUT endpoints).
Supports software configurable endpoints.
Supports Suspend, Resume and Remote Wakeup features.
Supports UTMI + Low Pin interface (ULPI) interface.
Supports Asynchronous Avalon clock interface
Preconfigured for 3 endpoints - CONTROL, 1-IN, 1-OUT.
Configurable Memory depth.
Supports software controlled PHY register access.
Ready to use component.
Meets good design practices.

Offering Brief

Device Family	Arria® II GX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, MAX® V CPLD, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	Yes
Compliance	Yes
Latest Quartus Version Supported	25.1.0
OS Support	Windows,Linux
Development Language	Encrypted Verilog, Verilog