USB 2.0 Device with FIFO Interface (USB20HF)

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System Level Solutions, Inc

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USB 2.0 device, FIFO interface (USB20HF) IP Core provides FIFO interface for endpoints and ULPI interface for Host communication. It supports 15 IN and OUT endpoints as per the USB standards which are configurable in Bulk, Interrupt and Isochronous modes as per the requirement. The core supports High Speed (480 Mbps), Full Speed (12 Mbps) and Low Speed (1.5 Mbps) functionality. It comes with three pre-configured endpoints - Control, Bulk IN, and Bulk OUT. The core has been optimized for different FPGAs, and its functionality has been verified on the hardware using EDA tools.

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Key Features

Supports High-speed (480Mbps), Full Speed (12Mbps) and Low Speed (1.5Mbps) USB operation.
Support ULPI interfaces.
Supported FIFO interface for endpoint communication.
Operated without processor.
Preconfigured for 3 endpoints - CONTROL, 1-BULK IN, 1-BULK OUT
Supports Bulk, Isochronous and Interrupt transfers.
Hardware Based USB Enumeration.
Optimized resource count.
Implemented in System Verilog RTL.

Offering Brief

Device Family	Arria® II GX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, MAX® V CPLD, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	Yes
Compliance	Yes
Latest Quartus Version Supported	25.1.0
OS Support	Windows,Linux
Development Language	Encrypted Verilog, Verilog