Logic Fruit's SATA 3 Controller IP provides robust performance for expanding storage solutions. It supports data transfer at up to 600 MB/s, making it ideal for high-capacity, cloud, and archival storage systems. Backward compatibility ensures easy integration with previous SATA versions. This controller offers a reliable solution for building scalable and efficient storage infrastructures.
Logic Fruit Global Technologies Inc
Key Features
- Fully compliant with Serial ATA spec revision 3.0
- Simple AXI streaming TX and RX interface for application layer communication.
- Supports Native Command Queuing and key primitives/FIS types from SATA specifications.
- Supports data rates of 1.5/3/6 Gbit/s.
Offering Brief
Offering Brief
| Device Family | Arria® V ST SoC FPGA, Arria® 10 SX SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Cyclone® V SX SoC FPGA, Cyclone® V GT FPGA, Arria® 10 GT FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | No |
| Evaluation License | No |
| Design Examples Available | Yes |
| Demo | No |
| Compliance | Yes |
| Latest Quartus Version Supported | 24.3.1 |
| Development Language | Verilog, VHDL |
Compliant SATA 3.0 Core – Fully compliant with Serial ATA specification revision 3.0, supporting 1.5/3/6 Gb/s data rates
AXI Streaming Interfaces – Simple AXI streaming TX and RX interface for communication with the application/user layer
Native Command Queuing (NCQ) – Support for NCQ and most primitives/FIS types defined in the SATA specification
PHY Layer with OOB Control & Transceiver – Includes out-of-band (OOB) control state machine for initialization, transceiver for parallel-to-serial data conversion
Encoding/Decoding Support – 8B/10B encoding and decoding, byte ordering, word alignment, and clock recovery from serial data
Speed Negotiation & PLL – Built-in support for SATA-II and SATA-III speed negotiation with integrated PLL
Link Layer Features – Frame formation/decomposition, host/device flow control, primitive handling (ALIGN, DMAT, EOF, SYNC, etc.), scrambling/descrambling, and CRC generation/checking
Transport Layer Features – 32-bit AXI stream interface, FIS construction/decomposition, error reporting, and flow control notifications
FIS Support – Register FIS, DMA Activate/Setup FIS, Data FIS, PIO Setup FIS, and Set Device Bits FIS
Ordering Information
sales@logic-fruit.com
from Direct
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