Real-Time JPEG Compression IP

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Gidel

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Gidel’s real-time JPEG image compression (encoder) IP enables high-performance JPEG compression on FPGA. The compression IP is unique in its fast processing capacity, low latency, and compact silicon utilization. As a result of its compactness, the IP can be implemented on a small FPGA device to compress high-performance camera image streams or, alternatively, instantiated multiple times on a single larger FPGA device. The JPEG IP can be embedded seamlessly in Gidel's image acquisition systems, including the Gidel frame grabbers and compact edge computers. The compression supports high-end camera streaming, including 10+ GigE Vision, CoaXPress and Camera Link. Gidel's real-time compression IPs are particularly beneficial for high-bandwidth and high-resolution imaging application enabling increased recording time, reduces storage size, and reduced post recording data offload and compression time on host computer.

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Key Features

Real-time on-FPGA JPEG compression
Seamlessly embedded in Gidel's image acquisition systems, including frame grabbers and compact edge computes
Low FPGA resource footprint
Can be embedded in Gidel's compact edge computers to enable long duration recording
Ideal for high bandwidth, high resolution imaging applications including aerial mapping, drone/UAV, surveillance, Streetview, etc.

Offering Brief

Device Family	Arria® 10 GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, Stratix® 10 GX FPGA
Offering Status	Production
Demo	No
Integrated Testbench	Yes
Evaluation License	No
Design Examples Available	Yes
Compliance	Yes
Compliance Link	Compliance Link
Latest Quartus Version Supported	20.4.0
Development Language	Encrypted Verilog, Encrypted VHDL, Verilog, VHDL