NetTimeLogic’s PTP Transparent Clock (TC) is a full hardware (FPGA) only implementation of an Transparent Clock according to IEEE1588-2019 (PTP). It is intended to wrap non-deterministic Ethernet cores/devices like Bridges, Switches or Redundancy Nodes and runs the whole protocol handling, algorithms and calculations are implemented in the core, no CPU is required which allows running PTP synchronization completely independent and standalone. The TC can run as an E2E or P2P TC and supports the following PTP Profiles: Default Profile, Power Profile, Utility Profile, TSN Profile (802.1AS) and ITU Profiles (ITU-T-G82651/G82751/G82752)
NetTimeLogic GmbH
Key Features
- PTP Transparent Clock according to IEEE1588-2019/2008
- Support for n-Ports, Full line speed
- Support for Default Profile: Layer 2 (Ethernet) and Layer 3 (Ip) support
- Support for Power Profile: C37.238-2011 and C37.238-2017 including VLAN support
- Support for Utility Profile: including HSR and PRP tag handling
- Support for IEEE802.1AS-REV: including IEEE802.1CB tag handling
- Support for ITU Profiles : ITUG82651, ITUG82751, ITUG82752
- One Step and Two Step support
- Peer to Peer (P2P) and End to End (E2E) delay measurement
- Optional Management and Optional Signaling Message support
- AXI4 Light register set or static configuration
Offering Brief
Offering Brief
| Device Family | Arria® 10 SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Cyclone® IV E FPGA, Stratix® 10 AX SoC FPGA |
|---|---|
| Offering Status | Production |
| Demo | No |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Compliance | No |
| Intertop | ISPCS, IIC |
| Latest Quartus Version Supported | 25.1.0 |
| OS Support | Not required |
| Development Language | VHDL |
Source Code
Ordering Information
NTL_PTP_TC
from Direct
Documentation & Resources
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