Jedec xSPI Controller (Silicon Proven IP for Altera Devices)

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Mobiveil Inc.

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Mobiveil’s xSPI Controller unifies legacy SPI through Octal DDR flows, mapping external flash/PSRAM into system memory via AXI4/AHB-Lite for fast code-execute-in-place and data access. A custom protocol sequencer abstracts vendor command sets (Macronix, Winbond, Micron, Cypress/Infineon, Adesto, etc.) to simplify bring-up across multiple devices. Deliverables include synthesizable Verilog RTL, SV/UVM testbench, protocol checkers, and design/verification/synthesis guides. System-validated architecture with multiple chip-selects and outstanding-address support.

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Key Features

JEDEC xSPI compliant supporting JESD251A/B standards for high-speed serial memory interfaces.
Operates with NOR, NAND, and HyperRAM devices from multiple vendors and Compatible with Winbond, Adesto, Micron, Macronix, Cypress, and other similar devices in the market.
Supports a wide range of industry devices including Winbond Octal NAND W35N04JWXXIC, NAND W25N01GWxxIG, NOR W25Q512JVxIQ, Adesto AT25XP032, Micron MT35XL256ABA, Micron MT25QU01GBBB8E0 (x4), Macronix MX25UM51245G, Cypress HyperFlash S26KL512S, Cypress Semper S26HS01GT, and Cypress HyperRAM S27KL0643 with xSPI interface.
Single controller handles SPI, Dual-SPI, Quad-SPI, and Octal-SPI in both SDR and DDR modes.
Customizable protocol sequencer supports device-specific command sets from Macronix, Winbond, Micron, Cypress, Adesto, and others.
Execute-In-Place (XIP) enables direct code execution from external flash.
Auto-boot capability allows direct boot from external SPI/OSPI/NAND memory at reset.
High-performance AXI4 or AHB-Lite data interfaces and AXI4-Lite or APB register interfaces.
Multi-chip select support for accessing multiple memory devices.
Burst and continuous transfer modes for higher throughput and reduced command overhead.
Proven in silicon with multiple SoCs and FPGA designs.

Offering Brief

Device Family	Arria® II GX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, eASIC™ N3X Devices, eASIC™ N3XS Devices, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	No
Demo	No
Compliance	No
Latest Quartus Version Supported	24.3.1
Development Language	Encrypted Verilog, Verilog