Real-time, high-quality HDR IP with virtually zero latency, based on a single exposure. The IP is designed for FPGAs and can be embedded seamlessly in Gidel’s modular vision/imaging grabbing and image processing systems, which include PCIe boards and edge computers supporting GigE Vision, CoaXPress, Camera Link, and user-defined protocols. The HDR IP has real-time performance and is particularly well suited for outdoor applications with challenging lighting conditions such as aerial imaging, drones/UAVs, street view, surveillance, etc.
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Gidel
Key Features
- High-quality real-time single exposure HDR IP for FPGA
- Adds brightness and contrast to dark areas while preserving the contrast of bright areas
- Dynamic area analytics optimizing brightness and contrast per pixel
- Enables adding image sharpening
- Enables limiting noise contrast enhancement
Offering Brief
Offering Brief
| Device Family | Agilex® 5 FPGAs and SoC FPGAs E-Series, Arria® 10 GX FPGA, Stratix® 10 GX FPGA |
|---|---|
| Offering Status | Production |
| Demo | No |
| Integrated Testbench | No |
| Evaluation License | No |
| Design Examples Available | Yes |
| Compliance | Yes |
| Compliance Link | Compliance Link |
| Latest Quartus Version Supported | 20.4.0 |
| Development Language | Encrypted Verilog, Encrypted VHDL, Verilog, VHDL |
IP License
Ordering Information
Gidel_HDR_IP
from Direct
Documentation & Resources
Market Segment and Sub-Segments
Aerospace
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Broadcast
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Defense
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