HBM2E is a high-performance memory IP that offers a combination of high memory bandwidth, low power consumption, low latency, and small form factor for Agilex™ 7 FPGA M-Series devices. HBM2E memory is well-suited for various high-performance computing applications.
Altera
Key Features
- Integrates two stacks of HBM2E DRAM with Agilex 7 FPGA M-Series with support for up to 32GB HBM2E in a single device
- Maximizes performance across all transactions with 2 dedicated hard memory controllers per device for each HBM2E stack.
- Up to 820 GB/s peak memory bandwidth - Up to 410GB/s memory bandwidth per HBM2E stack, 1.6x higher bandwidth vs prior generation, 10x more bandwidth vs DDR5, 7x more vs GDDR6
- High-performance network-on-chip (NoC) to help achieve the highest bandwidth.
Offering Brief
Offering Brief
| Device Family | Agilex® 7 FPGAs and SoC FPGAs M-Series |
|---|---|
| Offering Status | Production |
| Integrated Testbench | No |
| Evaluation License | No |
| Design Examples Available | Yes |
| Demo | No |
| Compliance | No |
| Development Language | Encrypted Verilog |
Encrypted Verilog source code
Design Example
Simulation Models
Documentation: IP User Guide, Design Example User Guide, IP Release Notes
Ordering Information
No ordering code required. License included with Quartus Prime
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Data Center Cloud (Public, Private, Hybrid)
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