The H16750S is a standard UART providing 100% software compatibility with the popular Texas Instruments 16750 device. It performs serial-to-parallel conversion on data originating from modems or other serial devices, and performs parallel-to-serial conversion on data from a CPU to these devices. The H16750S can be run in either 16450-compatible character mode or FIFO mode, where an internal FIFO relieves the CPU of excessive software overhead. An IrDA-compliant serial data port may be used for infrared communication. Developed for easy reuse in FPGA or ASIC applications, the H16750S is available optimized for several technologies with competitive utilization and performance characteristics
Computer Aided Software Technologies, Inc (dba CAST)
Key Features
- Supports all existing 16450 and 16550A software for seamless compatibility
- Fully synchronous design with all I/O based on the clock’s rising edge
- 16-byte FIFO buffers reduce CPU interrupts during transmit and receive
- FIFO sizes configurable: 8, 16, 32, 64, 128, or 256 bytes
- Programmable baud generator divides input clock and provides 16× output
- Supports automatic CTSn/RTSn flow control with programmable thresholds
- Serial interface configurable: 5–8 bits, parity, 1–2 stop bits, baud rate
- Includes diagnostic loopback, line break detect, and full status registers
Offering Brief
Offering Brief
| Device Family | Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Demo | No |
| Compliance | Yes |
| Latest Quartus Version Supported | 24.3.1 |
| Development Language | Encrypted Verilog, Encrypted VHDL, Verilog, VHDL |
Verilog/System Verilog, Encrypted Verilog/System Verilog, VHDL, Encrypted VHDL, or FPGA netlist
Sample integration testbench
System Verilog testbench
Comprehensive documentation
Ordering Information
H16750S
from Direct
$0.00
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