DVB-S2 demodulator / S2X demodulator

Overview Key Features Offering Brief What's Included Ordering Information Documentation & Resources Markets

Commsonic Ltd

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The CMS0059 has been designed from the ground-up for high-speed and gate-efficient implementation on FPGA and ASIC platforms and offers "near Shannon limit" performance when combined with an advanced LDPC decoder solution. The demodulator provides an adaptable starting point for receiver sub-systems to be used in the next-generation of digital TV set-top-boxes, VSAT terminals and related test and monitoring equipment.

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Key Features

Support for CCM, VCM and ACM modes.
Support for DVB-S2X Annex-M acquisition.
Sync acquisition at -2dB C/N.
Wide carrier acquisition range.
Programmable symbol rate recovery
Real IF, zero-IF or near-zero-IF.
Variable ADC sampling frequency.
Frame-by-frame (A)PSK selection.
QPSK, 8PSK, 16APSK, 32APSK, 64-APSK, 128-APSK and 256-APSK.
Short (16kb) and normal (64kb) frames

Offering Brief

Device Family	Arria® 10 SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Cyclone® IV E FPGA, Stratix® III FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	No
Compliance	No
Latest Quartus Version Supported	23.0.0
Development Language	C/C++, Encrypted VHDL