DisplayPort Transmitter and Receiver IP Cores compliant with DisplayPort 2.0/eDP 1.5 standards. These cores support line rates up to 8.1 Gbps and feature versatile capabilities, including multi-stream transport for up to four streams, dynamic lane configuration, HDR metadata support, and audio output for 2 to 8 channels, delivering exceptional multimedia performance.
Logic Fruit Global Technologies Inc
Key Features
- Data Rate 1.62, 2.7, 5.4 and 8.1 Gbps
- Video Resolution Upto 8k UHD/60Hz and Progressive, Interlaced Video Format
- Dynamic Lane Support for 1,2 or 4 lane
- Color Formats : RGB/YCbCr444/YCbCr422
- Supports Bits Per Component (BPC) : 6, 8, 10, 12 bpc
- Phy Interface : 16-bit Video
- Multi-stream transport (MST) upto 4 streams
- Upto 8k UHD Resolution
- Pixel Format : Single,Dual,Quad
Offering Brief
Offering Brief
| Device Family | Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® 10 SX SoC FPGA, Arria® 10 GT FPGA, Arria® V GZ FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | No |
| Evaluation License | No |
| Design Examples Available | No |
| Demo | No |
| Compliance | No |
| Latest Quartus Version Supported | 24.3.1 |
| Development Language | VHDL |
Supports multi-stream transport (MST) upto 4 streams and single stream transport (SST).
Dynamic support for variable bpc.
Dynamic lane support (1, 2, or 4 lanes).
Dynamic link rate support (1.62/2.7/5.4/8.1 Gb/s).
HDR Metadata support on secondary stream.
Audio output support (2 to 8 audio channels).
Ordering Information
sales@logic-fruit.com
from Direct
Market Segment and Sub-Segments
Broadcast
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Consumer
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Medical
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