The DE5-Net leverages the Stratix® V GX FPGA's integrated transceivers, which operate up to 12.5 Gbps, to achieve full PCI Express 3.0 compliance. This enables ultra low-latency, direct connections to four external 10G SFP+ modules without relying on an external PHY, accelerating the development of high-speed connectivity applications. For designs that demand high capacity and speed for memory and storage, the DE5-Net delivers with two independent banks of DDR3 SO-DIMM RAM, four independent banks of Cypress QDRII+ SRAM, high-speed parallel flash memory, and four SATA ports.
Terasic Inc.
Key Features
- High-Performance Stratix V GX FPGA
- Ultra Low-Latency Network Connectivity
- High-Bandwidth Memory Architecture
- CI Express 3.0 Compliance
Offering Brief
Offering Brief
| Device Family | Stratix® V GX FPGA |
|---|---|
| Offering Status | Production |
| Device OPN(s) on Board | 5SGXEA7N2F45C2 |
| Form Factor | 239 x 107 mm |
| Power | 12V |
| Interfaces | PCIe, QSFP, Temperature sensor |
| Memory | DDR3 SODIMM Socket x2, 72Mbit SRAM x4, 256MB FLASH, |
| Connectors | SFP+ connector x4, PCI Express (PCIe) x8 edge connector, RS422 expansion header |
| Switches & LEDs | LED x 4, Key x 4, Switch x 4, Seven-segment displays x2 |
| Latest Quartus Version Supported | 16.1.2 |
User Manual
Desgin Examples
Ordering Information
P0205
from Direct
$5995.00
Market Segment and Sub-Segments
Data Center Cloud (Public, Private, Hybrid)
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Industrial
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